Robust SRAM Designs and Analysis
Agu 2012 · Springer Science & Business Media
eBook
168
Halaman
reportRating dan ulasan tidak diverifikasi Pelajari Lebih Lanjut
Tentang eBook ini
This book provides a guide to Static Random Access Memory (SRAM) bitcell design and analysis to meet the nano-regime challenges for CMOS devices and emerging devices, such as Tunnel FETs. Since process variability is an ongoing challenge in large memory arrays, this book highlights the most popular SRAM bitcell topologies (benchmark circuits) that mitigate variability, along with exhaustive analysis. Experimental simulation setups are also included, which cover nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis. Emphasis is placed throughout the book on the various trade-offs for achieving a best SRAM bitcell design.
- Provides a complete and concise introduction to SRAM bitcell design and analysis;
- Offers techniques to face nano-regime challenges such as process variation, leakage and NBTI for SRAM design and analysis;
- Includes simulation set-ups for extracting different design metrics for CMOS technology and emerging devices;
- Emphasizes different trade-offs for achieving the best possible SRAM bitcell design.
Beri rating eBook ini
Sampaikan pendapat Anda.
Informasi bacaan
Smartphone dan tablet
Instal aplikasi Google Play Buku untuk Android dan iPad/iPhone. Aplikasi akan disinkronkan secara otomatis dengan akun Anda dan dapat diakses secara online maupun offline di mana saja.
Laptop dan komputer
Anda dapat mendengarkan buku audio yang dibeli di Google Play menggunakan browser web komputer.
eReader dan perangkat lainnya
Untuk membaca di perangkat e-ink seperti Kobo eReaders, Anda perlu mendownload file dan mentransfernya ke perangkat Anda. Ikuti petunjuk Pusat bantuan yang mendetail untuk mentransfer file ke eReaders yang didukung.
