FPGAs for Software Programmers

ยท ยท
ยท Springer
3.0
2 เชฐเชฟเชตเซเชฏเซ‚
เช‡-เชชเซเชธเซเชคเช•
327
เชชเซ‡เชœ
เชฐเซ‡เชŸเชฟเช‚เช— เช…เชจเซ‡ เชฐเชฟเชตเซเชฏเซ‚ เชšเช•เชพเชธเซ‡เชฒเชพ เชจเชฅเซ€ย เชตเชงเซ เชœเชพเชฃเซ‹

เช† เช‡-เชชเซเชธเซเชคเช• เชตเชฟเชถเซ‡

This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designerโ€™s point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays.

  • Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples;
  • Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs;
  • Explains the reasons for the energy efficiency and performance benefits of FPGA processing;
  • Provides a user-oriented approach and a sense for where and how to apply FPGA technology.

เชฐเซ‡เชŸเชฟเช‚เช— เช…เชจเซ‡ เชฐเชฟเชตเซเชฏเซ‚

3.0
2 เชฐเชฟเชตเซเชฏเซ‚

เชฒเซ‡เช–เช• เชตเชฟเชถเซ‡

Dirk Koch is a lecturer in the Advanced Processor Technologies Group at the University of Manchester. His main research interest is on run-time reconfigurable systems based on FPGAs, including methods, tools and applications. Current research projects include database acceleration using FPGAs based on stream processing as well as reconfigurable instruction set extensions for CPUs. Dirk was a program co-chair of the FPL2012 conference and he is a program committee member of many FPGA related conferences and workshops. He is author of the book "Partial Reconfiguration on FPGAs," he holds two patents, and he has (co-)authored over 50 conference and journal publications. Frank Hannig leads the Architecture and Compiler Design Group in the CS Department at the Friedrich-Alexander University Erlangen-Nรผrnberg (FAU), Germany, since 2004. He received a diploma degree in an interdisciplinary course of study in EE and CS from the University of Paderborn, Germany in 2000 and a Ph.D. degree (Dr.-Ing.) in CS from FAU in 2009. His main research interests are the design of massively parallel architectures, ranging from dedicated hardware to multi-core architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design. Frank has authored or co-authored more than 120 peer-reviewed publications. He serves on the program committees of several international conferences (ARC, ASAP, CODES+ISSS, DATE, DASIP, SAC). Frank is a senior member of the IEEE and an affiliate member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).divDaniel Ziener is currently a substitute professor for Cyber-Physical Systems at the Technische Universitรคt Hamburg-Harburg, Germany. From 2010 to 2015, he had led the Reconfigurable Computing Group in the Computer Science Department at Friedrich-Alexander University Erlangen-Nรผrnberg (FAU), Germany. His main research interests are the usage of partial dynamic reconfiguration of FPGAs, efficient usage of FPGA structures, design of signal processing FPGA cores, reliable and fault tolerant embedded systems, as well as security in FPGA-based systems. Daniel has (co-)authored more than 35 peer-reviewed publications, holds two patents, and serves as a program committee member of several international conferences (DATE, FPL, Reconfig, SPL) as well as a reviewer for several international journals.

เช† เช‡-เชชเซเชธเซเชคเช•เชจเซ‡ เชฐเซ‡เชŸเชฟเช‚เช— เช†เชชเซ‹

เชคเชฎเซ‡ เชถเซเช‚ เชตเชฟเชšเชพเชฐเซ‹ เช›เซ‹ เช…เชฎเชจเซ‡ เชœเชฃเชพเชตเซ‹.

เชฎเชพเชนเชฟเชคเซ€ เชตเชพเช‚เชšเชตเซ€

เชธเซเชฎเชพเชฐเซเชŸเชซเซ‹เชจ เช…เชจเซ‡ เชŸเซ…เชฌเซเชฒเซ‡เชŸ
Android เช…เชจเซ‡ iPad/iPhone เชฎเชพเชŸเซ‡ Google Play Books เชเชช เช‡เชจเซเชธเซเชŸเซ‰เชฒ เช•เชฐเซ‹. เชคเซ‡ เชคเชฎเชพเชฐเชพ เชเช•เชพเช‰เชจเซเชŸ เชธเชพเชฅเซ‡ เช‘เชŸเซ‹เชฎเซ…เชŸเชฟเช• เชฐเซ€เชคเซ‡ เชธเชฟเช‚เช• เชฅเชพเชฏ เช›เซ‡ เช…เชจเซ‡ เชคเชฎเชจเซ‡ เชœเซเชฏเชพเช‚ เชชเชฃ เชนเซ‹ เชคเซเชฏเชพเช‚ เชคเชฎเชจเซ‡ เช‘เชจเชฒเชพเช‡เชจ เช…เชฅเชตเชพ เช‘เชซเชฒเชพเช‡เชจ เชตเชพเช‚เชšเชตเชพเชจเซ€ เชฎเช‚เชœเซ‚เชฐเซ€ เช†เชชเซ‡ เช›เซ‡.
เชฒเซ…เชชเชŸเซ‰เชช เช…เชจเซ‡ เช•เชฎเซเชชเซเชฏเซเชŸเชฐ
Google Play เชชเชฐ เช–เชฐเซ€เชฆเซ‡เชฒ เช‘เชกเชฟเช“เชฌเซเช•เชจเซ‡ เชคเชฎเซ‡ เชคเชฎเชพเชฐเชพ เช•เชฎเซเชชเซเชฏเซเชŸเชฐเชจเชพ เชตเซ‡เชฌ เชฌเซเชฐเชพเช‰เชเชฐเชจเซ‹ เช‰เชชเชฏเซ‹เช— เช•เชฐเซ€เชจเซ‡ เชธเชพเช‚เชญเชณเซ€ เชถเช•เซ‹ เช›เซ‹.
eReaders เช…เชจเซ‡ เช…เชจเซเชฏ เชกเชฟเชตเชพเช‡เชธ
Kobo เช‡-เชฐเซ€เชกเชฐ เชœเซ‡เชตเชพ เช‡-เช‡เช‚เช• เชกเชฟเชตเชพเช‡เชธ เชชเชฐ เชตเชพเช‚เชšเชตเชพ เชฎเชพเชŸเซ‡, เชคเชฎเชพเชฐเซ‡ เชซเชพเช‡เชฒเชจเซ‡ เชกเชพเช‰เชจเชฒเซ‹เชก เช•เชฐเซ€เชจเซ‡ เชคเชฎเชพเชฐเชพ เชกเชฟเชตเชพเช‡เชธ เชชเชฐ เชŸเซเชฐเชพเชจเซเชธเชซเชฐ เช•เชฐเชตเชพเชจเซ€ เชœเชฐเซ‚เชฐ เชชเชกเชถเซ‡. เชธเชชเซ‹เชฐเซเชŸเซ‡เชก เช‡-เชฐเซ€เชกเชฐ เชชเชฐ เชซเชพเช‡เชฒเซ‹ เชŸเซเชฐเชพเชจเซเชธเซเชซเชฐ เช•เชฐเชตเชพ เชฎเชพเชŸเซ‡ เชธเชนเชพเชฏเชคเชพ เช•เซ‡เชจเซเชฆเซเชฐเชจเซ€ เชตเชฟเช—เชคเชตเชพเชฐ เชธเซ‚เชšเชจเชพเช“ เช…เชจเซเชธเชฐเซ‹.